abc

system for sequential logic synthesis and verification

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  1. Package version
    abc-1.01.20210519
  2. Maintainer
    Alessandro De Laurenzis

ABC is a growing software system for synthesis and verification of binary
sequential logic circuits appearing in synchronous hardware designs. ABC
combines scalable logic optimization based on And-Inverter Graphs (AIGs),
optimal-delay DAG-based technology mapping for look-up tables and standard
cells, and innovative algorithms for sequential synthesis and verification.

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